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STM32F207VCT6 데이터시트(PDF) 61 Page - STMicroelectronics |
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STM32F207VCT6 데이터시트(HTML) 61 Page - STMicroelectronics |
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61 / 177 page ![]() STM32F20xxx Electrical characteristics Doc ID 15818 Rev 9 61/177 5.1.6 Power supply scheme Figure 17. Power supply scheme 1. Each power supply pair must be decoupled with filtering ceramic capacitors as shown above. These capacitors must be placed as close as possible to, or below, the appropriate pins on the underside of the PCB to ensure the good functionality of the device. 2. To connect REGOFF and IRROFF pins, refer to Section 2.2.16: Voltage regulator. 3. The two 2.2 µF ceramic capacitors should be replaced by two 100 nF decoupling capacitors when the voltage regulator is OFF. 4. The 4.7 µF ceramic capacitor must be connected to one of the VDD pin. ai17527e VDD 1/2/...14/15 VBAT GP I/O s OUT IN Kernel logic (CPU, digital & RAM) Backup circuitry (OSC32K,RTC, Backup registers, backup RAM) Wakeup logic 15 × 100 nF + 1 × 4.7 μF 1.8-3.6 V VSS 1/2/...14/15 VDDA VREF+ VREF- VSSA ADC IO Logic VDD 100 nF + 1 μF VREF 100 nF + 1 μF VDD Flash memory VCAP_1 VCAP_2 2 × 2.2 μF REGOFF IRROFF Power switch Analog RCs, PLL, ... Voltage regulator |
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