LED5000 datasheet(40/52 Pages) STMICROELECTRONICS

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Application notes - alternative topologies

LED5000

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Doc ID 023951 Rev 1

In case of open row, the positive output voltage tends to diverge, exceeding the D3

maximum reverse voltage and so the diode would be damaged. The overvoltage protection

limits VOUT and it protects the power components in case of load disconnection.

The network D4, R8 implements a level shifter to drive the gate of the transistor Q1. The

voltage at Q1 is:

Equation 64

Considering the VIN range 18 to 30 V:

Equation 65

the gate is driven inside the component specification. R8 can be dimensioned to discharge

the gate when VSW is low.

In case the input voltage range of the application is not suitable to implement a level shifter

to drive Q1, a dissipative clamping network (like R5, D6) must be used.

To design the compensation network for the positive buck-boost topology please refer to

paragraph

Chapter 6.4: Compensation network design for alternative topologies.

6.3

Floating boost

The floating boost topology (see

Figure 30) serves those applications with an input voltage

range narrower than the output voltage, that is the voltage drop across the LEDs and the

sensing resistor (i.e. VIN < VOUT). The topology is called floating since the output voltage is

referred to VIN and not GND, but this is typically suitable for a floating load like a string of

LEDs.

Figure 30.

Floating boost

The device is supplied by the output voltage so the maximum voltage drop across the LEDs

string is 48 V. The direct path of the boost conversion (COUT, VDIODE, L) guarantees the

proper startup when the input voltage is:

Q1 GATE

DZ4

–

15V

–

Q1 GATE MIN

DZ4

–

18V

15V

–

Q1 GATE MAX

DZ4

–

30V

16V

–

15V

VREF

VCC

GND

VIN

AM13514v1

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