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DM96LS02 데이터시트(PDF) 1 Page - Fairchild Semiconductor |
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DM96LS02 데이터시트(HTML) 1 Page - Fairchild Semiconductor |
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1 / 8 page ![]() © 2000 Fairchild Semiconductor Corporation DS009816 www.fairchildsemi.com October 1988 Revised March 2000 DM96LS02 Dual Retriggerable Resettable Monostable Multivibrator General Description The DM96LS02 is a dual retriggerable and resettable monostable multivibrator. The one-shot provides excep- tionally wide delay range, pulse width stability, predictable accuracy and immunity to noise. The pulse width is set by an external resistor and capacitor. Resistor values up to 1.0 M Ω reduce required capacitor values. Hysteresis is pro- vided on both trigger inputs of the DM96LS02 for increased noise immunity. Features s Required timing capacitance reduced by factors of 10 to 100 over conventional designs s Broad timing resistor range—1.0 k Ω to 2.0 MΩ s Output Pulse Width is variable over a 2000:1 range by resistor control s Propagation delay of 35 ns s 0.3V hysteresis on trigger inputs s Output pulse width independent of duty cycle s 35 ns to ∞ output pulse width range Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol VCC = Pin 16 GND = Pin 8 Pin Descriptions Connection Diagram Order Number Package Number Package Description DM96LS02M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM96LS02N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Pin Names Description I0 Trigger Input (Active Falling Edge) I0 Schmitt Trigger Input (Active Falling Edge) I1 Schmitt Trigger Input (Active Rising Edge) CD Direct Clear Input (Active LOW) Q True Pulse Output Q Complementary Pulse Output |
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