LCMXO2-1200ZE-2TG100C datasheet(5/106 Pages) LATTICE

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DS1035 Architecture_01.5

January 2013

Data Sheet DS1035

or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

Architecture Overview

The MachXO2 family architecture contains an array of logic blocks surrounded by Programmable I/O (PIO). The

larger logic density devices in this family have sysCLOCK™ PLLs and blocks of sysMEM Embedded Block RAM

(EBRs). Figures 2-1 and 2-2 show the block diagrams of the various family members.

Figure 2-1. Top View of the MachXO2-1200 Device

Figure 2-2. Top View of the MachXO2-4000 Device

sysMEM Embedded

Block RAM (EBR)

sysCLOCK PLL

PIOs Arranged into

sysIO Banks

Programmable Function Units

with Distributed RAM (PFUs)

Embedded Function

Block (EFB)

User Flash Memory

(UFM)

On-chip Configuration

Flash Memory

Note: MachXO2-256, and MachXO2-640/U are similar to MachXO2-1200. MachXO2-256 has a lower LUT count and no PLL or EBR blocks.

MachXO2-640 has no PLL, a lower LUT count and two EBR blocks. MachXO2-640U has a lower LUT count, one PLL and seven EBR blocks.

sysMEM Embedded

Block RAM (EBR)

Programmable Function Units

with Distributed RAM (PFUs)

On-chip Configuration

Flash Memory

sysCLOCK PLL

PIOs Arranged into

sysIO Banks

Embedded

Function Block(EFB)

User Flash

Memory (UFM)

Note: MachXO2-1200U, MachXO2-2000/U and MachXO2-7000 are similar to MachXO2-4000. MachXO2-1200U and MachXO2-2000 have a lower LUT count,

one PLL, and eight EBR blocks. MachXO2-2000U has a lower LUT count, two PLLs, and 10 EBR blocks. MachXO2-7000 has a higher LUT count, two PLLs,

and 26 EBR blocks.

MachXO2 Family Data Sheet

Architecture

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