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ADP160ACBZ-3.0-R7 데이터시트(PDF) 20 Page - Analog Devices |
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ADP160ACBZ-3.0-R7 데이터시트(HTML) 20 Page - Analog Devices |
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20 / 24 page ![]() ADP160/ADP161/ADP162/ADP163 Data Sheet Rev. G | Page 20 of 24 OUTLINE DIMENSIONS *COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS. 1.60 BSC 2.80 BSC 1.90 BSC 0.95 BSC 0.20 0.08 0.60 0.45 0.30 8° 4° 0° 0.50 0.30 0.10 MAX *1.00 MAX *0.90 MAX 0.70 MIN 2.90 BSC 54 12 3 SEATING PLANE Figure 53. 5-Lead Thin Small Outline Transistor Package [TSOT] (UJ-5) Dimensions shown in millimeters 1.000 0.965 SQ 0.925 BOTTOM VIEW (BALL SIDE UP) TOP VIEW (BALL SIDE DOWN) A 1 2 B BALL A1 IDENTIFIER 0.50 REF 0.640 0.595 0.550 END VIEW 0.340 0.320 0.300 0.370 0.355 0.340 SEATING PLANE 0.270 0.240 0.210 COPLANARITY 0.03 Figure 54. 4-Ball Wafer Level Chip Scale Package [WLCSP] (CB-4-1) Dimensions shown in millimeters |
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