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TAS5707APHPR 데이터시트(PDF) 21 Page - Texas Instruments

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부품명 TAS5707APHPR
상세설명  20-W STEREO DIGITAL AUDIO POWER AMPLIFIER WITH EQ AND DRC
PDF  58 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

TAS5707APHPR 데이터시트(HTML) 21 Page - Texas Instruments

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23
22
SCLK
32Clks
LRCLK
LeftChannel
24-BitMode
1
19
18
20-BitMode
16-BitMode
15
14
MSB
LSB
32Clks
RightChannel
2-ChannelLeft-JustifiedStereoInput
T0034-02
4
5
9
8
1
4
5
1
0
0
0
23
22
1
19
18
15
14
MSB
LSB
4
5
9
8
1
4
5
1
0
0
0
SCLK
TAS5707, TAS5707A
www.ti.com
SLOS556B – NOVEMBER 2008 – REVISED NOVEMBER 2009
Left-Justified
Left-justified (LJ) timing uses LRCLK to define when the data being transmitted is for the left channel and when it
is for the right channel. LRCLK is high for the left channel and low for the right channel. A bit clock running at 32,
48, or 64 × fS is used to clock in the data. The first bit of data appears on the data lines at the same time LRCLK
toggles. The data is written MSB first and is valid on the rising edge of the bit clock. The DAP masks unused
trailing data bit positions.
NOTE: All data presented in 2s-complement form with MSB first.
Figure 20. Left-Justified 64-fS Format
Copyright © 2008–2009, Texas Instruments Incorporated
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Product Folder Link(s): TAS5707 TAS5707A



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