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MPC5534 Microcontroller Data Sheet, Rev. 6

Revision History for the MPC5534 Data Sheet

Freescale Semiconductor

Revision History for the MPC5534 Data Sheet

The history of revisions made to this data sheet are described in this section. The changes are divided into

each revision of this document.

The substantive changes incorporated in MPC5534 Data Sheet revision 4.0 to produce revision 5.0 are:

•

Text changes

•

Table and figure changes

Within each group, the changes are listed in sequential page number order.

5.1

Changes Between Revisions 5.0 and 6.0

5.2

Changes Between Revisions 4.0 and 5.0

The following table lists the substantive text changes made to paragraphs.

Location

Description of Changes

Section 3.7,

“Power-Up/Down

Sequencing

Added the following paragraph in Section 3.7, “Power-Up/Down Sequencing.

During initial power ramp-up, when vstby is 0.6v or above. a typical current of 1-3mA and maximum of

4mA may be seen until VDD is applied. This current will not reoccur until Vstby is lowered below Vstby

min specification.

Moved Figure 2“ISTBY Worst-case Specifications” to Section 3.7, “Power-Up/Down Sequencing

Table 28. Text Changes Between Rev. 4.0 and 5.0

Location

Description of Changes

Title page:

Changed the Revision number from 4.0 to 5.0. Changed the date format to DD MMM YYYY. Made the same

changes in the lower left corner of the back page.

Section 3.2.1, “General Notes for Specifications at Maximum Junction Temperature

Updated the address of Semiconductor Equipment and Materials International

3081 Zanker Rd.

San Jose, CA., 95134

(408) 943-6900

Table 16 on page 24

Added footnote 9: For frequencies up to and including 80 MHz, if VDD is within ±5% of 1.5 V, then

APC = RWSC = 0b010 is a valid setting.

4 Mechanicals:

Added the following NOTE before the 208 and 324 BGA Maps:

NOTE

The MPC5500 devices are pin compatible for software portability and use the primary

function names to label the pins in the BGA diagram. Although some devices do not support

all the primary functions shown in the BGA diagram, the muxed and GPIO signals on those

pins remain available. See the signals chapter in the device reference manual for the signal

muxing.

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