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OMAP3530ECUS 데이터시트(PDF) 31 Page - Texas Instruments

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부품명 OMAP3530ECUS
상세설명  OMAP3530/25 Applications Processor: OMAP 3 Architecture
PDF  264 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

OMAP3530ECUS 데이터시트(HTML) 31 Page - Texas Instruments

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OMAP3530/25 Applications Processor
www.ti.com
SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009
Table 2-1. Ball Characteristics (CBB Pkg.) (continued)
BALL
BALL TOP
PIN NAME
MODE [4]
TYPE [5]
BALL
BALL
RESET REL. POWER [9]
HYS [10]
BUFFER
PULLUP
IO CELL [13]
BOTTOM [1] [2]
[3]
RESET
RESET REL. MODE [8]
STRENG TH /DOWN
STATE [6]
STATE [7]
(mA) [11]
TYPE [12]
sys_
1
I
ndmareq2
mcbsp4_dr
2
I
gpt10_pwm_ 3
IO
evt
gpio_56
4
IO
safe_mode
7
P8
NA
gpmc_ncs6
0
O
H
H
7
vdds_ mem
Yes
4
PU/ PD
LVCMOS
sys_
1
I
ndmareq3
mcbsp4_dx
2
IO
gpt11_pwm_ 3
IO
evt
gpio_57
4
IO
safe_mode
7
N8
NA
gpmc_ncs7
0
O
H
H
7
vdds_ mem
Yes
4
PU/ PD
LVCMOS
gpmc_io_dir
1
O
mcbsp4_fsx
2
IO
gpt8_pwm_e 3
IO
vt
gpio_58
4
IO
safe_mode
7
T4
W2
gpmc_clk
0
O
L
0
0
vdds_ mem
Yes
4
PU/ PD
LVCMOS
gpio_59
4
IO
safe_mode
7
F3
W1
gpmc_nadv_ 0
O
0
0
0
vdds_ mem
No
4
NA
LVCMOS
ale
G2
V2
gpmc_noe
0
O
1
1
0
vdds_ mem
No
4
NA
LVCMOS
F4
V1
gpmc_nwe
0
O
1
1
0
vdds_ mem
No
4
NA
LVCMOS
G3
AC12
gpmc_nbe0_ 0
O
L
0
0
vdds_ mem
Yes
4
PU/ PD
LVCMOS
cle
gpio_60
4
IO
safe_mode
7
U3
NA
gpmc_nbe1
0
O
L
L
7
vdds_ mem
Yes
4
PU/ PD
LVCMOS
gpio_61
4
IO
safe_mode
7
H1
AB10
gpmc_nwp
0
O
L
0
0
vdds_ mem
Yes
4
PU/ PD
LVCMOS
gpio_62
4
IO
safe_mode
7
M8
AB12
gpmc_wait0
0
I
H
H
0
vdds_ mem
Yes
NA
PU/ PD
LVCMOS
L8
AC10
gpmc_wait1
0
I
H
H
7
vdds_ mem
Yes
4
PU/ PD
LVCMOS
gpio_63
4
IO
safe_mode
7
K8
NA
gpmc_wait2
0
I
H
H
7
vdds_ mem
Yes
4
PU/ PD
LVCMOS
gpio_64
4
IO
safe_mode
7
J8
NA
gpmc_wait3
0
I
H
H
7
vdds_ mem
Yes
4
PU/ PD
LVCMOS
sys_
1
I
ndmareq1
gpio_65
4
IO
safe_mode
7
D28
NA
dss_pclk
0
O
H
H
7
vdds
Yes
8
PU/ PD
LVCMOS
gpio_66
4
IO
safe_mode
7
D26
NA
dss_hsync
0
O
H
H
7
vdds
Yes
8
PU/ PD
LVCMOS
gpio_67
4
IO
safe_mode
7
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TERMINAL DESCRIPTION
31



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