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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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OMAP3530ECBBA 데이터시트(PDF) 132 Page - Texas Instruments |
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OMAP3530ECBBA 데이터시트(HTML) 132 Page - Texas Instruments |
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132 / 264 page  3.6.2 Power-down Sequence 034-009 vdds_dpll_dll, vdds_dpll_per vdd_core, vdd_mpu_iva sys_32k sys_nrespwron sys_xtalin vdds_mmc1,vdds_mmc1a, vdda_dac vdds_sram vdds_wkup_bg vdds, vdds_mem OMAP3530/25 Applications Processor SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009 www.ti.com The following steps give an example of the power-down sequence supported by the OMAP3530/25 device. 1. Reset OMAP3530/25 device. 2. Stop all signals driven to OMAP3530/25 balls. 3. Option 1: Power down all domains simutaneously. 4. Option 2: If all domains cannot be powered down simultaneously, follow the below sequence: a. Power off all complex I/O domains (vdds_mmc1, vdds_mmc1a, vdda_dac) b. Power off all core domains (vdd_core, vdd_mpu_iva) c. Power off all PLL domains (vdds_dpll_dll, vdds_dpll_per) d. Power off all SRAM LDOs (vdds_sram) e. Power off all reference domains (vdds_wkup_bg) f. Power off all standard I/O domains (vdds, vdds_mem) The OMAP3530/25 device proceeds with the power-down sequence shown in . Figure 3-4. Power-down Sequence 132 ELECTRICAL CHARACTERISTICS Submit Documentation Feedback |
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