AFE5809ZCF datasheet(65/90 Pages) TI

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DC Removal Block

Down Conversion

(I Phase)

Down Conversion

(Q Phase)

Decimator

Decimation

Filter

Down

Sampler

Decimator

Down

Sampler

Decimation

Filter

To Channel

Multiplexing

To Channel

Multiplexing

Channel A

A.I

A.Q

AFE5809

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SLOS738C – SEPTEMBER 2012 – REVISED JANUARY 2013

Figure 85. Digital Demodulator Block

1. DC Removal Block is used to remove DC offset. An offset value can be given to specific register.

2. Down Conversion or Demodulation of signal is done by multiplying signal by cos(

ω0t) and by -sin(ω0t) to give

out I phase and Q phase respectively. cos(

ωt) and -sin(ωt) are 14-bit wide plus a sign bit. ω = 2πf, f can be

set with resolution Fs /216, where Fs is the ADC sampling frequency.

NOTE

The digital demodulator is based on a conventional down converter, that is, -sin(

ω0t) is

used for Q phase.

3. Decimator Block has two functions, Decimation Filter and Down Sampler. Decimation Filter is a variable

coefficient symmetric FIR filter and it's coefficients can be given using Coefficient RAM. Number of taps of

FIR filter is 16 x decimation factor (M). For decimation factor of M, 8M coefficients have to be stored in

Coefficient Bank. Each coefficient is 14 bit wide. Down-sampler gives out 1 sample followed by M-1 samples

zeros.

4. In Figure 86, channel multiplexing is implemented for flexible data routing. :

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