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TMP86FS49FG 데이터시트(PDF) 17 Page - Toshiba Semiconductor

부품명 TMP86FS49FG
상세설명  8 Bit Microcontroller
PDF  42 Pages
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제조업체  TOSHIBA [Toshiba Semiconductor]
홈페이지  http://www.semicon.toshiba.co.jp/eng
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Page 15
TMP86FS49FG
(6) SLEEP2 mode
The SLEEP2 mode is the idle mode corresponding to the SLOW2 mode. The status under the
SLEEP2 mode is same as that under the SLEEP1 mode, except for the oscillation circuit of the high-
frequency clock.
(7) SLEEP0 mode
In this mode, all the circuit, except oscillator and the timer-base-timer, stops operation. This mode
is enabled by setting “1” on bit TGHALT on the system control register 2 (SYSCR2).
When SLEEP0 mode starts, the CPU stops and the timing generator stops feeding the clock to the
peripheral circuits other than TBT. Then, upon detecting the falling edge of the source clock selected
with TBTCR<TBTCK>, the timing generator starts feeding the clock to all peripheral circuits.
When returned from SLEEP0 mode, the CPU restarts operating, entering SLOW1 mode back
again. SLEEP0 mode is entered and returned regardless of how TBTCR<TBTEN> is set. When IMF
= “1”, EF6 (TBT interrupt individual enable flag) = “1”, and TBTCR<TBTEN> = “1”, interrupt pro-
cessing is performed. When SLEEP0 mode is entered while TBTCR<TBTEN> = “1”, the INTTBT
interrupt latch is set after returning to SLOW1 mode.
2.2.3.3 STOP mode
In this mode, the internal oscillation circuit is turned off, causing all system operations to be halted. The
internal status immediately prior to the halt is held with a lowest power consumption during STOP mode.
STOP mode is started by the system control register 1 (SYSCR1), and STOP mode is released by a
inputting (Either level-sensitive or edge-sensitive can be programmably selected) to the STOP pin. After
the warm-up period is completed, the execution resumes with the instruction which follows the STOP
mode start instruction.
Note 1: NORMAL1 and NORMAL2 modes are generically called NORMAL; SLOW1 and SLOW2 are called SLOW; IDLE0, IDLE1
and IDLE2 are called IDLE; SLEEP0, SLEEP1 and SLEEP2 are called SLEEP.
Note 2
SYSCR2<XEN> = "1"
STOP pin input
STOP pin input
STOP pin input
Interrupt
Interrupt
SYSCR2<XEN> = "0"
SYSCR2<SYSCK> = "1"
SYSCR2<XTEN> = "0"
SYSCR2<SYSCK> = "0"
SYSCR1<STOP> = "1"
SYSCR1<STOP> = "1"
SYSCR1<STOP> = "1"
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
Interrupt
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
Interrupt
SYSCR2<TGHALT> = "1"
Reset release
NORMAL1
mode
IDLE0
mode
(a) Single-clock mode
IDLE1
mode
NORMAL2
mode
IDLE2
mode
SYSCR2<XTEN> = "1"
SLOW2
mode
SLEEP2
mode
SLOW1
mode
SLEEP1
mode
SLEEP0
mode
RESET
(b) Dual-clock mode
STOP
SYSCR2<TGHALT> = "1"
Note 2
TENTATIVE



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