| 전자부품 데이터시트 검색엔진 |
|
S12SCIV2D 데이터시트(PDF) 87 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
S12SCIV2D 데이터시트(HTML) 87 Page - Freescale Semiconductor, Inc |
|
87 / 126 page ![]() MC9S12DJ64 Device User Guide — V01.17 87 A.1.5 Absolute Maximum Ratings Absolute maximum ratings are stress ratings only. A functional operation under or outside those maxima is not guaranteed. Stress beyond those limits may affect the reliability or cause permanent damage of the device. This device contains circuitry protecting against damage due to high static voltage or electrical fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (e.g., either VSS5 or VDD5). Table A-1 Absolute Maximum Ratings1 NOTES: 1. Beyond absolute maximum ratings device might be damaged. Num Rating Symbol Min Max Unit 1 I/O, Regulator and Analog Supply Voltage VDD5 -0.3 6.0 V 2 Digital Logic Supply Voltage 2 2. The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply. The absolute maximum ratings apply when the device is powered from an external source. VDD -0.3 3.0 V 3 PLL Supply Voltage 2 VDDPLL -0.3 3.0 V 4 Voltage difference VDDX to VDDR and VDDA ∆ VDDX -0.3 0.3 V 5 Voltage difference VSSX to VSSR and VSSA ∆ VSSX -0.3 0.3 V 6 Digital I/O Input Voltage VIN -0.3 6.0 V 7 Analog Reference VRH, VRL -0.3 6.0 V 8 XFC, EXTAL, XTAL inputs VILV -0.3 3.0 V 9 TEST input VTEST -0.3 10.0 V 10 Instantaneous Maximum Current Single pin limit for all digital I/O pins 3 3. All digital I/O pins are internally clamped to VSSX and VDDX, VSSR and VDDR or VSSA and VDDA. I D -25 +25 mA 11 Instantaneous Maximum Current Single pin limit for XFC, EXTAL, XTAL4 4. Those pins are internally clamped to VSSPLL and VDDPLL. I DL -25 +25 mA 12 Instantaneous Maximum Current Single pin limit for TEST 5 5. This pin is clamped low to VSSR, but not clamped high. This pin must be tied low in applications. I DT -0.25 0 mA 13 Storage Temperature Range T stg – 65 155 °C |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |