FDC37C78 datasheet(57/82 Pages) MICROCHIP

57 / 82 page

LOCK

In order to protect systems with long DMA

latencies against older application software that

can disable the FIFO the LOCK Command has

been added. This command should only be used

by the FDC routines, and application software

should refrain from using it. If an application calls

for the FIFO to be disabled then the CONFIGURE

command should be used.

The LOCK command defines whether the EFIFO,

FIFOTHR, and PRETRK parameters of the

CONFIGURE command can be RESET by the

DOR and DSR registers. When the LOCK bit is

set to logic "1" all subsequent "software RESETS

by the DOR and DSR registers will not change the

previously set parameters to their default values.

All "hardware" RESET from the RESET pin will set

the LOCK bit to logic "0" and return the EFIFO,

FIFOTHR, and PRETRK to their default values.

A status byte is returned immediately after issuing

a a LOCK command. This byte reflects the value

of the LOCK bit set by the command byte.

ENHANCED DUMPREG

The DUMPREG command is designed to support

system

run-time

diagnostics

and

application

software

development

and

debug.

accommodate the LOCK command and the

enhanced PERPENDICULAR MODE command

the eighth byte of the DUMPREG command has

been modified to contain the additional data from

these two commands.

COMPATIBILITY

The FDC37C78

was

designed

with software

compatibility in mind.

It is a fully backwards-

compatible

solution

with

the older generation

765A/B

disk

controllers.

The

FDC

also

implements on-board registers for compatibility

with PC/AT and PC/XT floppy disk controller

subsystems. After a hardware reset of the FDC, all

registers, functions and enhancements default to a

PC/AT compatible operating mode.

FDC37C78 데이터시트(PDF) 57 Page - Microchip Technology

FDC37C78 데이터시트(HTML) 57 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

데이터시트 다운로드

링크 URL