| 전자부품 데이터시트 검색엔진 |
|
FV80503CSM66166 데이터시트(PDF) 13 Page - Intel Corporation |
|
|
|||||||||||||||||||||||||||||
FV80503CSM66166 데이터시트(HTML) 13 Page - Intel Corporation |
|
13 / 62 page ![]() Low-Power Embedded Pentium® Processor with MMX™ Technology Datasheet 13 2.2.2 16-Kbyte Code and Data Caches On-chip level-1 data and code cache sizes are 16 Kbytes each and are 4-way set associative on the Pentium processor with MMX technology. Large separate internal caches improve performance by reducing average memory access time and providing fast access to recently-used instructions and data. The instruction and data caches can be accessed simultaneously while the data cache supports two data references simultaneously. The data cache supports a write-back (or alternatively, write- through, on a line-by-line basis) policy for memory updates. 2.2.3 Improved Branch Prediction Dynamic branch prediction uses the Branch Target Buffer (BTB) to boost performance by predicting the most likely set of instructions to be executed. The BTB has been improved on the Pentium processor with MMX technology to increase its accuracy. This processor has four prefetch buffers that can hold up to four successive code streams. 2.2.4 Enhanced Pipeline An additional pipeline stage has been added and the pipeline has been enhanced to improve performance. The integration of the MMX technology pipeline with the integer pipeline is very similar to that of the floating-point pipeline. Under some circumstances, two MMX instructions or one integer and one MMX instruction can be paired and issued in one clock cycle to increase throughput. The enhanced pipeline is described in more detail in the Embedded Pentium ® Processor Family Developer’s Manual (order number 273204). 2.2.5 Deeper Write Buffers A pool of four write buffers is now shared between the dual pipelines to improve memory write performance. 2.3 0.25 Micron Technology The 0.25 micron technology is the state-of-the-art CMOS manufacturing process Intel unveiled on April 12, 1997, enabling the use of lower core supply to sub-2 V. As a result, the low-power embedded Pentium processor with MMX technology consumes significantly less power at even higher speeds. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |