| 전자부품 데이터시트 검색엔진 |
|
ADP1655ACBZ-R7 데이터시트(PDF) 5 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADP1655ACBZ-R7 데이터시트(HTML) 5 Page - Analog Devices |
|
5 / 24 page ![]() ADP1655 Rev. 0 | Page 5 of 24 I2C-COMPATIBLE INTERFACE TIMING SPECIFICATIONS Table 3. Parameter1 Min Max Unit Description fSCL 400 kHz SCL clock frequency tHIGH 0.6 μs SCL high time tLOW 1.3 μs SCL low time tSU, DAT 100 ns Data setup time tHD, DAT 0 0.9 μs Data hold time tSU, STA 0.6 μs Setup time for repeated start tHD, STA 0.6 μs Hold time for start/repeated start tBUF 1.3 μs Bus free time between a stop and a start condition tSU, STO 0.6 μs Setup time for stop condition tR 20 + 0.1 CB2 300 ns Rise time of SCL and SDA tF 20 + 0.1 CB 300 ns Fall time of SCL and SDA tSP 0 50 ns Pulse width of suppressed spike CB 400 pF Capacitive load for each bus line 1 Guaranteed by design. 2 CB is the total capacitance of one bus line in picofarads. SDA SCL S S = START CONDITION Sr = REPEATED START CONDITION P = STOP CONDITION Sr P S tLOW tR tHD, DAT tHIGH tSU, DAT tF tF tSU, STA tHD, STA tSP tSU, STO tBUF tR Figure 3. I2C-Compatible Interface Timing Diagram |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |