THS1031

3-V TO 5.5-V, 10-BIT, 30 MSPS

CMOS ANALOG-TO-DIGITAL CONVERTER

SLAS242E – NOVEMBER 1999 – REVISED MARCH 2002

19

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

Sample

and

Hold

1

–1/2

–1/2

ADC

Core

PGA

REFTF = AVDD + (REFTS – REFBS)

AIN+

REFTS

REFBS

Internal

Reference

Buffer

REFBF = AVDD – (REFTS – REFBS)

2

2

and REFBS pins and its outputs internally switched to pins REFTF and REFBF. The internal connections

(REFTS to REFTF) and (REFBS to REFBF) are broken.

To match the signal span to the full ADC input span, the voltage difference between REFTS and REFBS should

be REFTS – REFBS = [(FS+) – (FS–)]

× Gain, with the average of the REFTS and REFBS voltages being the

AIN midscale voltage, VM.

choose to use the ORG output to VREF as either REFTS or REFBS.

AIN

REFTS

REFBS

REFTF

REFBF

REFSENSE

MODE

AVDD

+FS

–FS

DC SOURCE = VM + [(FS+) – (FS–)]

×

DC SOURCE =VM – [(FS+) – (FS–)]

×

0.1

µF

10

µF

0.1

µF

0.1

µF

GAIN

2

GAIN

2