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USB3613 데이터시트(PDF) 65 Page - SMSC Corporation |
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USB3613 데이터시트(HTML) 65 Page - SMSC Corporation |
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65 / 68 page ![]() USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications Datasheet SMSC USB3613 65 Revision 1.0 (06-17-13) DATASHEET 9.6 Clock Specifications The device can accept a 24 MHz single-ended clock oscillator input. REFCLK should be driven with a clock that adheres to the specifications outlined in Section 9.6.1, "External Reference Clock (REFCLK)". 9.6.1 External Reference Clock (REFCLK) The following input clock specifications are suggested: 50% duty cycle ± 10% ± 350 PPM The input frequency of REFCLK is user configurable. Refer to Section 8.4, "Reference Clock" for additional information on configuring a reference clock input. Note: The external clock is recommended to conform to the signalling levels designated in the JEDEC specification on 1.2V CMOS Logic. Table 9.8 SPI Timing Values (60 MHz Operation) SYMBOL DESCRIPTION MIN TYP MAX UNITS tfc Clock frequency 60 MHz tceh Chip enable (SPI_CE_EN) high time 50 ns tclq Clock to input data 9 ns tdh Input data hold time 0 ns tos Output setup time 5 ns toh Output hold time 5 ns tov Clock to output valid 4 ns tcel Chip enable (SPI_CE_EN) low to first clock 12 ns tceh Last clock to chip enable (SPI_CE_EN) high 12 ns |
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