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LPC81XM 데이터시트(PDF) 53 Page - NXP Semiconductors |
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LPC81XM 데이터시트(HTML) 53 Page - NXP Semiconductors |
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53 / 71 page ![]() LPC81xM All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 3 — 29 July 2013 53 of 71 NXP Semiconductors LPC81xM 32-bit ARM Cortex-M0+ microcontroller 13. Analog characteristics 13.1 BOD [1] Interrupt levels are selected by writing the level value to the BOD control register BODCTRL. [2] Typical ratings are not guaranteed. The values listed are for room temperature (25 C), V DD = 3.3 V, typical samples. 13.2 Internal voltage reference [1] Characterized through simulation. [2] Characterized on a typical silicon sample. Table 19. BOD static characteristics[1] Tamb =-40 C to +105 C. Symbol Parameter Conditions Typ[2] Unit Vth threshold voltage interrupt level 1 assertion 2.3 V de-assertion 2.4 V interrupt level 2 assertion 2.6 V de-assertion 2.7 V interrupt level 3 assertion 2.8 V de-assertion 2.9 V reset level 1 assertion 2.1 V de-assertion 2.2 V reset level 2 assertion 2.4 V de-assertion 2.5 V reset level 3 assertion 2.6 V de-assertion 2.8 V Table 20. Internal voltage reference static and dynamic characteristics Symbol Parameter Conditions Min Typ Max Unit VO output voltage Tamb = 40 C to +105 C [1] 0.855 0.900 0.945 V Tamb = 70 C to 105 C [2] -0.906 - V Tamb = 50 C [2] -0.905 - V Tamb = 25 C [4] 0.893 0.903 0.913 V Tamb = 0 C [2] -0.902 - V Tamb = 20 C [2] -0.899 - V Tamb = 40 C [2] -0.896 - V ts(pu) power-up settling time to 99% of VO [3] - 155 195 s |
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