Hi-Speed USB Transceiver with 1.8V ULPI Interface - 19.2MHz Reference Clock

Revision 2.1 (06-10-10)

6

PRODUCT PREVIEW

Pin Definitions

The following table details the pin definitions for the figure above.

Table 1 USB3316 Pin Description

PIN/

BALL

NAME

DIRECTION/

TYPE

ACTIVE

LEVEL

DESCRIPTION

1

B1

ID

Input,

Analog

N/A

ID pin of the USB cable. For non-OTG

applications this pin can be floated. For

an A-Device ID is grounded. For a B-

Device ID is floated.

2

C1

VBUS

I/O,

Analog

N/A

VBUS pin of the USB cable. This pin is

used for the Vbus comparator inputs and

for Vbus pulsing during session request

protocol.

3

C2

VBAT

Power

N/A

Regulator input. The regulator supply can

be from 5.5V to 3.1V.

4

D2

VDD3.3

Power

N/A

3.3V Regulator Output. A 2.2uF (<1 ohm

ESR) bypass capacitor to ground is

required for regulator stability. The

bypass capacitor should be placed as

close as possible to the USB3316.

5

D1

DM

I/O,

Analog

N/A

D- pin of the USB cable.

6

E1

DP

I/O,

Analog

N/A

D+ pin of the USB cable.

7

E2

SPKR_R/M

I/O,

Analog

N/A

USB switch in/out for DP signals

8

E3

SPKR_L

I/O,

Analog

N/A

USB switch in/out for DM signals

9

D3

DATA[7]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[7] is

the MSB.

10

E4

DATA[6]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

11

D4

DATA[5]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

12

E5

DATA[4]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

13

D5

CLKOUT

Output,

CMOS

N/A

60MHz reference clock output. All ULPI

signals are driven synchronous to the

rising edge of this clock.

The system must not drive voltage on the

CLKOUT pin following POR or hardware

14

C4

DATA[3]

I/O,

CMOS

N/A

ULPI bi-directional data bus.