H5TQ2G43CFR-RDC datasheet(27/33 Pages) HYNIX

부품명	H5TQ2G43CFR-RDC

상세설명	2Gb DDR3 SDRAM

PDF	33 Pages

Scroll/Zoom	100%

제조업체	HYNIX [Hynix Semiconductor]

홈페이지	http://www.skhynix.com/kor/main.do

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27 / 33 page

Rev. 1.0 / Apr. 2013

DDR3-1066 Speed Bins

For specific Notes See "Speed Bin Table Notes" on page 32.

Speed Bin

DDR3-1066F

Unit

Note

CL - nRCD - nRP

7-7-7

Parameter

Symbol

min

max

Internal read command to

first data

tAA

13.125

ACT to internal read or

write delay time

tRCD

13.125

—

PRE command period

tRP

13.125

—

ACT to ACT or REF

command period

tRC

50.625

—

ACT to PRE command

period

tRAS

37.5

9 * tREFI

CL = 5

CWL = 5

tCK(AVG)

3.0

3.3

1,2 3 4,6,12,13

CWL = 6

tCK(AVG)

Reserved

CL = 6

CWL = 5

tCK(AVG)

2.5

3.3

1,2,3,6

CWL = 6

tCK(AVG)

Reserved

1,2,3,4

CL = 7

CWL = 5

tCK(AVG)

Reserved

CWL = 6

tCK(AVG)

1.875

< 2.5

1,2,3,4

CL = 8

CWL = 5

tCK(AVG)

Reserved

CWL = 6

tCK(AVG)

1.875

< 2.5

1,2,3

Supported CL Settings

5, 6, 7, 8

nCK

Supported CWL Settings

5, 6

nCK

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