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AD7376ARUZ10-R7 데이터시트(PDF) 15 Page - Analog Devices |
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AD7376ARUZ10-R7 데이터시트(HTML) 15 Page - Analog Devices |
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15 / 20 page ![]() AD7376 Rev. D | Page 15 of 20 LAYOUT AND POWER SUPPLY BIASING It is a good practice to employ a compact, minimum lead-length layout design. The leads to the input should be as direct as possible, with a minimum conductor length. Ground paths should have low resistance and low inductance. Similarly, it is also good practice to bypass the power supplies with quality capacitors. Low ESR (equivalent series resistance) 1 μF to 10 μF tantalum or electrolytic capacitors should be applied at the supplies to minimize transient disturbances and filter low frequency ripple. Figure 31 illustrates the basic supply bypassing configuration for the AD7376. The ground pin of the AD7376 is a digital ground reference. To minimize the digital ground bounce, the AD7376 digital ground terminal should be joined remotely to the analog ground (see Figure 31). VDD VDD VSS VSS GND C3 AD7376 C4 C1 + + C2 10µF 10µF 0.1µF 0.1µF Figure 31. Power Supply Bypassing |
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