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ADSP-21486KSWZ-2AB 데이터시트(PDF) 40 Page - Analog Devices

부품명 ADSP-21486KSWZ-2AB
상세설명  SHARC Processor
PDF  68 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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ADSP-21486KSWZ-2AB 데이터시트(HTML) 40 Page - Analog Devices

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Rev. B
|
Page 40 of 68
|
March 2013
ADSP-21483/ADSP-21486/ADSP-21487/ADSP-21488/ADSP-21489
The SPORTx_TDV_O output signal (routing unit) becomes
active in SPORT multichannel mode. During transmit slots
(enabled with active channel selection registers) the
SPORTx_TDV_O is asserted for communication with external
devices.
Table 38. Serial Ports—TDV (Transmit Data Valid)
Parameter
Min
Max
Unit
Switching Characteristics1
tDRDVEN
TDV Assertion Delay from Drive Edge of External Clock
3
ns
tDFDVEN
TDV Deassertion Delay from Drive Edge of External Clock
8
ns
tDRDVIN
TDV Assertion Delay from Drive Edge of Internal Clock
–1
ns
tDFDVIN
TDV Deassertion Delay from Drive Edge of Internal Clock
2
ns
1 Referenced to drive edge.
Figure 24. Serial Ports—TDM Internal and External Clock
DRIVE EDGE
DRIVE EDGE
DAI_P20–1
(SCLK, EXT)
tDRDVEN
tDFDVEN
DRIVE EDGE
DRIVE EDGE
DAI_P20–1
(SCLK, INT)
tDRDVIN
tDFDVIN
TDVx
DAI_P20-1
TDVx
DAI_P20-1



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