| 전자부품 데이터시트 검색엔진 |
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PE42821 데이터시트(PDF) 9 Page - Peregrine Semiconductor |
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PE42821 데이터시트(HTML) 9 Page - Peregrine Semiconductor |
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9 / 12 page ![]() Product Specification PE42821 Page 9 of 12 Document No. DOC-13714-3 │ www.psemi.com ©2012-2013 Peregrine Semiconductor Corp. All rights reserved. Figure 14. Evaluation Board Layout Evaluation Kit The PE42821 Evaluation Kit board was designed to ease customer evaluation of the PE42821 RF switch. The evaluation board in Figure 14 was designed to test the part. DC power is supplied through J10, with VDD on pin 9, and GND on the entire lower row of even numbered pins. To evaluate a switch path, add or remove jumpers on V1 (pin 3) using Table 5. The ANT port is connected through a 50Ω transmission line via the top SMA connector, J1. RF1 and RF2 paths are also connected through 50Ω transmission lines via SMA connectors as J2 and J3. A 50Ω through transmission line is available via SMA connectors J5 and J6. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. An open-ended 50Ω transmission line is also provided at J4 for calibration if needed. Narrow trace widths are used near each part to improve impedance matching. The shunt C1 on RFC port is to provide for high frequency impedance matching. PRT-10605 |
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