STM6823 datasheet(22/29 Pages) STMICROELECTRONICS

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DC and AC parameters

STM6321/6322STM6821/6822/6823/6824/6825

22/29

Reset threshold

temperature coefficient

ppm/C

Push-button reset input

tMLMH

tMR

MR pulse width

µs

tMLRL

tMRD

MR to RST output delay

500

MR glitch immunity

100

MR pull-up resistor

Watchdog timer

tWD

(6)

Watchdog timeout period

1.12

1.60

2.24

WDI pulse width(7)

VCC ≥ 3.0 V

Valid for ambient operating temperature: TA = –40 to 85°C; VCC = 4.5 to 5.5 V for “L/M” versions; VCC = 2.7 to 3.6 V for

“T/S/R” versions; and VCC = 1.2 to 2.75 V for “Z/Y” version (except where noted).

VCC (min) = 1.0 V for TA = 0 to +85°C.

WDI input is designed to be driven by a three-state output device. To float WDI, the “high-impedance mode” of the output

device must have a maximum leakage current of 10 µA and a maximum output capacitance of 200 pF. The output device

must also be able to source and sink at least 200 µA when active.

WDI is internally serviced within the watchdog period if WDI is left unconnected.

The leakage current measured on the RST pin is tested with the reset asserted (output high impedance).

Other trec and watchdog timings are offered. Minimum order quantities may apply. Contact local sales office for availability.

For VCC < 3.0 V, tWD(min) = 100 ns.

Table 6.

DC and AC characteristic (continued)

Sym

Alter-

native

Description

Test condition (1)

Min

Typ

Max

Unit

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