| 전자부품 데이터시트 검색엔진 |
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PIC18F1220E/SSSQTP 데이터시트(PDF) 90 Page - Microchip Technology |
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PIC18F1220E/SSSQTP 데이터시트(HTML) 90 Page - Microchip Technology |
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90 / 308 page ![]() PIC18F1220/1320 DS39605F-page 88 © 2007 Microchip Technology Inc. FIGURE 10-2: BLOCK DIAGRAM OF RA3:RA0 PINS FIGURE 10-3: BLOCK DIAGRAM OF OSC2/CLKO/RA6 PIN FIGURE 10-4: BLOCK DIAGRAM OF RA4/T0CKI PIN FIGURE 10-5: BLOCK DIAGRAM OF OSC1/CLKI/RA7 PIN Data Bus QD EN P N WR LATA WR TRISA Data Latch TRIS Latch RD TRISA RD PORTA VSS VDD I/O pin(1) Note 1: I/O pins have protection diodes to VDD and VSS. Analog Input Mode To A/D Converter and LVD Modules RD LATA or PORTA Q D Q CK Q D Q CK Schmitt Trigger Input Buffer Data Bus Q D Q CK QD EN P N WR LATA WR Data Latch TRIS Latch RD RD PORTA VSS VDD I/O pin(1) Note 1: I/O pins have protection diodes to VDD and VSS. or PORTA RD LATA RA6 Enable ECIO or Enable RCIO TRISA Q D Q CK TRISA Schmitt Trigger Input Buffer Data Bus WR TRISA RD PORTA Data Latch TRIS Latch Schmitt Trigger Input Buffer N VSS I/O pin(1) TMR0 Clock Input Q D Q CK Q D Q CK EN QD EN RD LATA WR LATA or PORTA Note 1: I/O pins have protection diodes to VDD and VSS. RD TRISA Data Bus Q D Q CK QD EN P N WR LATA WR Data Latch TRIS Latch RD RD PORTA VSS VDD I/O pin(1) Note 1: I/O pins have protection diodes to VDD and VSS. or PORTA RD LATA Enable RA7 TRISA Q D Q CK TRISA RA7 Enable To Oscillator Schmitt Trigger Input Buffer |
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