PIC18F1220ESLASHSSSQTP datasheet(124/308 Pages) MICROCHIP

124 / 308 page

PIC18F1220/1320

DS39605F-page 122

15.5.4

HALF-BRIDGE MODE

In the Half-Bridge Output mode, two pins are used as

outputs to drive push-pull loads. The PWM output

signal is output on the RB3/CCP1/P1A pin, while the

complementary PWM output signal is output on the

RB2/P1B/INT2 pin (Figure 15-6). This mode can be

used

for

half-bridge

applications,

shown

Figure 15-7, or for full-bridge applications, where four

power switches are being modulated with two PWM

signals.

In Half-Bridge Output mode, the programmable dead-

band delay can be used to prevent shoot-through

current in half-bridge power devices. The value of bits,

PDC6:PDC0 (PWM1CON<6:0>), sets the number of

instruction cycles before the output is driven active. If the

value is greater than the duty cycle, the corresponding

output remains inactive during the entire cycle. See

Section 15.5.6 “Programmable Dead-Band Delay”

for more details of the dead-band delay operations.

The TRISB<3> and TRISB<2> bits must be cleared to

configure P1A and P1B as outputs.

FIGURE 15-6:

HALF-BRIDGE PWM

OUTPUT (ACTIVE-HIGH)

FIGURE 15-7:

EXAMPLES OF HALF-BRIDGE OUTPUT MODE APPLICATIONS

Period

Duty Cycle

(1)

P1A

P1B

td = Dead-Band Delay

Period

(1)

Note

1: At this time, the TMR2 register is equal to the

PR2 register.

PIC18F1220/1320

P1A

P1B

FET

Driver

FET

Driver

Load

FET

Driver

FET

Driver

V+

V-

Load

FET

Driver

FET

Driver

PIC18F1220/1320

P1A

P1B

Standard Half-Bridge Circuit (“Push-Pull”)

Half-Bridge Output Driving a Full-Bridge Circuit

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