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PIC18F1220E/SSSQTP 데이터시트(PDF) 168 Page - Microchip Technology |
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PIC18F1220E/SSSQTP 데이터시트(HTML) 168 Page - Microchip Technology |
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168 / 308 page ![]() PIC18F1220/1320 DS39605F-page 166 © 2007 Microchip Technology Inc. FIGURE 18-2: LOW-VOLTAGE DETECT (LVD) BLOCK DIAGRAM The LVD module has an additional feature that allows the user to supply the trip voltage to the module from an external source. This mode is enabled when bits, LVDL3:LVDL0, are set to ‘1111’. In this state, the com- parator input is multiplexed from the external input pin, LVDIN (Figure 18-3). This gives users flexibility, because it allows them to configure the Low-Voltage Detect interrupt to occur at any voltage in the valid operating range. FIGURE 18-3: LOW-VOLTAGE DETECT (LVD) WITH EXTERNAL INPUT BLOCK DIAGRAM LVDIF VDD LVDEN LVD Control Register Internally Generated Reference Voltage LVDIN 1.2V LVD EN LVD Control BGAP BODEN LVDEN VxEN LVDIN Register VDD VDD Externally Generated Trip Point |
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