TLV5626

2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG

CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN

SLAS236A –JUNE 1999 – REVISED JUNE 2000

12

POST OFFICE BOX 655303

APPLICATION INFORMATION

data bits: CONTROL

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

X

X

X

X

X

X

X

X

X

X

REF1

REF0

X: don’t care

REF1 and REF0 determine the reference source and, if internal reference is selected, the reference voltage.

reference bits

REF1

REF0

REFERENCE

0

0

External

0

1

1.024 V

1

0

2.048 V

1

1

External

CAUTION:

If external reference voltage is applied to the REF pin, external reference MUST be selected.

examples of operation:

1.

Set reference voltage to 2.048 V (CONTROL register):

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

1

1

0

1

0

0

0

0

0

0

0

0

0

0

1

0

2.

Write new DAC A value and update DAC A output:

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

1

1

0

0

New DAC A output value

0

0

0

0

The DAC A output is updated on the rising clock edge after D0 is sampled.

To output data consecutively using the same DAC configuration, it is not necessary to program the CONTROL

register again.

3.

Select external reference (CONTROL register):

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

1

1

0

1

0

0

0

0

0

0

0

0

0

0

0

0

4.

Write new DAC B value to BUFFER and update DAC B output:

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

0

1

0

0

New BUFFER content and DAC B output value

0

0

0

0

X = Don’t care

The DAC A output is updated on the rising clock edge after D0 is sampled.

To output data consecutively using the same DAC configuration, it is not necessary to program the CONTROL

register again.