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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AD5337ARM 데이터시트(PDF) 17 Page - Analog Devices |
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AD5337ARM 데이터시트(HTML) 17 Page - Analog Devices |
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17 / 28 page  AD5337/AD5338/AD5339 Rev. C | Page 17 of 28 Default Readback Condition All pointer byte bits power up to 0. Therefore, if the user initiates a readback without writing to the pointer byte first, no single DAC channel has been specified. In this case, the default readback bits are all 0s, except for the CLR bit, which is 1. Multiple DAC Write Sequence Because there are individual bits in the pointer byte for each DAC, it is possible to write the same data and control bits to two DACs simultaneously by setting the relevant bits to 1. Multiple DAC Read Back Sequence If the user attempts to read back data from more than one DAC at a time, the part reads back the default, power-on reset conditions, that is, all 0s except for CLR, which is 1. WRITE OPERATION When writing to the AD5337/AD5338/AD5339 DACs, the user must begin with an address byte (R/W = 0), after which the DAC acknowledges that it is prepared to receive data by pulling SDA low. This address byte is followed by the pointer byte, which is also acknowledged by the DAC. Two bytes of data are then written to the DAC, as shown in Figure 33. A stop condition follows. PD0 CLR LDAC D7 D6 D5 D4 PD1 LSB MSB PD0 CLR LDAC D9 D8 D7 D6 PD1 PD0 D11 D10 D9 D8 PD1 MOST SIGNIFICANT DATA BYTE 8-BIT AD5337 LSB MSB 10-BIT AD5338 LSB MSB 12-BIT AD5339 CLR LDAC LEAST SIGNIFICANT DATA BYTE 8-BIT AD5337 D3 D2 D1 D0 X D5 D4 D3 D2 D1 D0 X X D7 D6 D5 D4 D3 D2 D1 D0 LSB MSB LSB MSB 10-BIT AD5338 LSB MSB 12-BIT AD5339 XX X Figure 32. Data Formats for Write and Read Back 00 0 1 1X X SCL SDA SCL SDA 0 START CONDITION BY MASTER ADDRESS BYTE A0 R/W MSB MOST SIGNIFICANT DATA BYTE LSB ACK BY AD533x MSB ACK BY AD533x POINTER BYTE LSB ACK BY AD533x MSB LEAST SIGNIFICANT DATA BYTE LSB ACK BY AD533x STOP CONDITION BY MASTER Figure 33. Write Sequence |
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