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AD9912A/PCBZ 데이터시트(PDF) 36 Page - Analog Devices

부품명 AD9912A/PCBZ
상세설명  1 GSPS Direct Digital Synthesizer with 14-Bit DAC
PDF  40 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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AD9912A/PCBZ 데이터시트(HTML) 36 Page - Analog Devices

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AD9912
Rev. F | Page 36 of 40
Register 0x01A9—FTW0 (Frequency Tuning Word) (Continued)
Table 27.
Bits
Bit Name
Description
[31:24]
FTW0
These registers contain the FTW (frequency tuning word) for the DDS. The FTW determines the ratio
of the AD9912 output frequency to its DAC system clock. Register 0x01A6 is the least significant
byte of the FTW. Note that the power-up default is defined by start-up Pin S1 to Pin S4. Updates to
the FTW results in an instantaneous frequency jump but no phase discontinuity.
Register 0x01AA—FTW0 (Frequency Tuning Word) (Continued)
Table 28.
Bits
Bit Name
Description
[39:32]
FTW0
These registers contain the FTW (frequency tuning word) for the DDS. The FTW determines the ratio
of the AD9912 output frequency to its DAC system clock. Register 0x01A6 is the least significant
byte of the FTW. Note that the power-up default is defined by start-up Pin S1 to Pin S4. Updates to
the FTW results in an instantaneous frequency jump but no phase discontinuity.
Register 0x01AB—FTW0 (Frequency Tuning Word) (Continued)
Table 29.
Bits
Bit Name
Description
[47:40]
FTW0
These registers contain the FTW (frequency tuning word) for the DDS. The FTW determines the ratio
of the AD9912 output frequency to its DAC system clock. Register 0x01A6 is the least significant
byte of the FTW. Note that the power-up default is defined by start-up Pin S1 to Pin S4. Updates to
the FTW results in an instantaneous frequency jump but no phase discontinuity.
Register 0x01AC—Phase
Table 30.
Bits
Bit Name
Description
[7:0]
DDS phase word
Allows the user to vary the phase of the DDS output. See the Direct Digital Synthesizer section.
Register 0x01AC is the least significant byte of the phase offset word (POW). Note that a momentary
phase discontinuity may occur as the phase passes through 45° intervals.
Register 0x01AD—Phase (Continued)
Table 31.
Bits
Bit Name
Description
[13:8]
DDS phase word
Allows the user to vary the phase of the DDS output. See the Direct Digital Synthesizer section.
Register 0x01AC is the least significant byte of the phase offset word (POW). Note that a momentary
phase discontinuity may occur as the phase passes through 45° intervals.



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