ADSP-BF607 datasheet(65/112 Pages) AD

65 / 112 page

Rev. 0

Page 65 of 112

June 2013

ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609

Asynchronous Write

Table 32. Asynchronous Memory Write (BxMODE = b#00)

VDD_EXT

1.8V/3.3V Nominal

Parameter

Min

Max

Unit

Timing Requirement

tDARDYAWE

SMC0_ARDY Valid After SMC0_AWE Low2

(WAT – 2.5) ×

tSCLK0 – 17.5

Switching Characteristics

tENDAT

DATA Enable After SMC0_AMSx Assertion

–3

tDDAT

DATA Disable After SMC0_AMSx Deassertion

tAMSAWE

SMC0_Ax/SMC0_AMSx Assertion Before SMC0_AWE

Low

(PREST + WST + PREAT) × tSCLK0 – 2

tHAWE

Output

4 Hold After SMC0_AWE High5

WHT × tSCLK0 – 2

tWAWE

SMC0_AWE Active Low Width

WAT × tSCLK0 – 2

tDAWEARDY

SMC0_AWE High Delay After SMC0_ARDY Assertion

2.5 × tSCLK0

3.5 × tSCLK0 + 17.5 ns

1 SMC_BxCTL.ARDYEN bit = 1.

2 WAT value set using the SMC_BxTIM.WAT bits.

3 PREST, WST, PREAT values set using the SMC_BxETIM.PREST bits, SMC_BxTIM.WST bits, SMC_BxETIM.PREAT bits, and the SMC_BxTIM.RAT bits.

4 Output signals are DATA, SMC0_Ax, SMC0_AMSx, SMC0_ABEx.

5 WHT value set using the SMC_BxTIM.WHT bits.

6 SMC_BxCTL.ARDYEN bit = 0.

Figure 16. Asynchronous Write

SMC0_AWE

SMC0_ABEx

SMC0_Ax

tDARDYAWE

tAMSAWE

tDAWEARDY

tENDAT

tDDAT

tHAWE

tWAWE

SMC0_AMSx

SMC0_Dx (DATA)

SMC0_ARDY

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