| 전자부품 데이터시트 검색엔진 |
|
ADG5421 데이터시트(PDF) 9 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADG5421 데이터시트(HTML) 9 Page - Analog Devices |
|
9 / 20 page ![]() Data Sheet ADG5421/ADG5423 Rev. 0 | Page 9 of 20 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Pin Configuration Table 7. Pin Function Descriptions Pin No. Mnemonic Description 1 S1 Source Terminal 1. This pin can be an input or output. 2 S2 Source Terminal 2. This pin can be an input or output. 3 NC No Connect. Not internally connected. 4 GND Ground (0 V) Reference. 5 VDD Most Positive Power Supply Potential. 6 IN2 Logic Control Input. 7 IN1 Logic Control Input. 8 VSS Most Negative Power Supply Potential. 9 D2 Drain Terminal 2. This pin can be an input or output. 10 D1 Drain Terminal 1. This pin can be an input or output. Table 8. ADG5421 Truth Table INx Switch Conditions 0 Off 1 On Table 9. ADG5423 Truth Table INx Switch 1 Condition Switch 2 Condition 0 Off On 1 On Off NOTES 1. NC = NO CONNECT. NOT INTERNALLY CONNECTED. S1 1 S2 2 NC 3 GND 4 VDD 5 D1 10 D2 9 VSS 8 IN1 7 IN2 6 TOP VIEW (Not to Scale) ADG5421/ ADG5423 |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |