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AM3703CUS 데이터시트(PDF) 258 Page - Texas Instruments |
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AM3703CUS 데이터시트(HTML) 258 Page - Texas Instruments |
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258 / 280 page ![]() AM3715, AM3703 SPRS616F – JUNE 2010 – REVISED AUGUST 2011 www.ti.com Table 6-126. MMC2 and MMC3 Interfaces Switching Characteristics —SDIO Identification Mode(4)(7)(7) NO. PARAMETER OPP100 OPP50 UNIT MIN MAX MIN MAX Standard SDIO Mode SD1 tc(clk) Frequency(1), output clock period 0.4 0.4 MHz SD2 tW(clkH) Typical pulse duration, output clock high X(5) * X(5) * ns PO(2) PO(2) SD2 tW(clkL) Typical pulse duration, output clock low Y(6) * Y(6) * ns PO(2) PO(2) tdc(clk) Duty cycle error, output clock 125 125 ns tJ(clk) Jitter standard deviation(3), output clock 200 200 ps tR(clk) Rise time, output clock 10 10 ns tF(clk) Fall time, output clock 10 10 ns tR(data) Rise time, output data 10 10 ns tF(data) Fall time, output data 10 10 ns SD5 td(CLKOH-CMD) Delay time, mmcx_clk rising clock edge to 6.3 2492.7 6.3 77.03 ns mmcx_cmd transition (1) Related to the output mmcx_clk maximum and minimum frequency. (2) P = output mmcx_clk period in ns (3) The jitter probability density can be approximated by a Gaussian function. (4) Corresponding figures showing timing parameters are common with other interface modes (see SDIO, HS SDIO modes). (5) The X parameter is defined as follows: CLKD X 1 or Even 0.5 Odd (trunk[CLKD/2]+1)/CLKD All required details about clock division factor CLKD can be found in the AM/DM37x Multimedia Device Technical Reference Manual (literature number SPRUGN4). (6) The Y parameter is defined as follows: CLKD Y 1 or Even 0.5 Odd (trunk[CLKD/2])/CLKD All required details about clock division factor CLKD can be found in the AM/DM37x Multimedia Device Technical Reference Manual (literature number SPRUGN4). (7) In mmcx, x is equal to 2 or 3. 6.6.8.1.7 MMC2 and MMC3 Interfaces —High-Speed SDIO Mode Table 6-128 and Table 6-129 assume testing over the recommended operating conditions and electrical characteristic conditions below (see Figure 6-73 and Figure 6-74). Table 6-127. MMC2 and MMC3 Interfaces Timing Conditions —High-Speed SDIO Mode TIMING CONDITION PARAMETER VALUE UNIT MIN MAX Input Conditions tR Input signal rise time 0.18 5.69 ns tF Input signal fall time 0.19 5.70 ns Output Condition CLOAD Output load capacitance(1) 5 pF 258 Timing Requirements and Switching Characteristics Copyright © 2010–2011, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM3715 AM3703 |
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