LP2998

GND

+

+

+

SD

SD

LP2998

www.ti.com

SNVS521I – DECEMBER 2007 – REVISED APRIL 2013

LP2998 DDR-I and DDR-II Termination Regulator

Check for Samples: LP2998

1

FEATURES

DESCRIPTION

The LP2998 linear regulator is designed to meet

2

•

Source and Sink Current

JEDEC SSTL-2 and JEDEC SSTL-18 specifications

•

Low Output Voltage Offset

for

termination

of

DDR1-SDRAM

and

DDR-II

•

No External Resistors Required

memory.

The

device

contains

a

high-speed

operational amplifier to provide excellent response to

•

Linear Topology

load transients. The output stage prevents shoot

•

Suspend to Ram (STR) Functionality

through while delivering 1.5A continuous current as

•

Low External Component Count

required for DDR1-SDRAM termination, and 0.5A

continuous current as required for DDR-II termination.

•

Thermal Shutdown

•

Available in SOIC-8, SO PowerPAD-8 Packages

reference for the chipset and DIMMs.

APPLICATIONS

An additional feature found on the LP2998 is an

•

DDR-I, DDR-II and DDR-III Termination Voltage

active low shutdown (SD) pin that provides Suspend

•

SSTL-18 Termination

To RAM (STR) functionality. When SD is pulled low,

the

•

SSTL-2 and SSTL-3 Termination

•

HSTL Termination

power savings advantage can be obtained in this

mode through lower quiescent current.

Typical Application Circuit

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Copyright © 2007–2013, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.