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LTC1735IGN 데이터시트(PDF) 8 Page - Linear Technology

부품명 LTC1735IGN
상세설명  High Efficiency Synchronous Step-Down Switching Regulator
PDF  32 Pages
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제조업체  LINER [Linear Technology]
홈페이지  http://www.linear.com
Logo LINER - Linear Technology

LTC1735IGN 데이터시트(HTML) 8 Page - Linear Technology

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LTC1735
1735fc
VOSENSE: Receives the feedback voltage from an external
resistive divider across the output.
SENSE: The (–) Input to the Current Comparator.
SENSE+: The (+) Input to the Current Comparator. Built-in
offsets between SENSEand SENSE+ pins in conjunction
with RSENSE set the current trip threshold.
PGOOD (LTC1735F Only): Open-Drain Logic Output.
PGOOD is pulled to ground when the voltage on the
VOSENSE pin is not within ±7.5% of its set point.
EXTVCC: Input to the Internal Switch Connected to INTVCC.
This switch closes and supplies VCC power whenever
EXTVCC is higher than 4.7V. See EXTVCC connection in the
Applications Information section. Do not exceed 7V on
this pin and ensure EXTVCC ≤ VIN.
PGND: Driver Power Ground. Connects to the source of
bottom N-channel MOSFET, the anode of the Schottky
diode, and the (–) terminal of CIN.
BG:
High
Current
Gate
Drive
for
Bottom
N-Channel MOSFET. Voltage swing at this pin is from
ground to INTVCC.
INTVCC: Output of the Internal 5.2V Regulator and EXTVCC
Switch. The driver and control circuits are powered from
this voltage. Decouple to power ground with a 1
µFceramic
capacitor placed directly adjacent to the IC together with a
minimum of 4.7
µF tantalum or other low ESR capacitor.
VIN: Main Supply Pin. Must be closely decoupled to power
ground.
SW: Switch Node Connection to Inductor and Bootstrap
Capacitor. Voltage swing at this pin is from a Schottky
diode (external) voltage drop below ground to VIN.
BOOST: Supply to Topside Floating Driver. The bootstrap
capacitor is returned to this pin. Voltage swing at this pin
is from a diode drop below INTVCC to (VIN + INTVCC).
TG: High Current Gate Drive for Top N-Channel MOSFET.
This is the output of a floating driver with a voltage swing
equal to INTVCC superimposed on the switch node voltage
SW.
PI FU CTIO S



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