LTC3602

15

3602fb

APPLICATIONS INFORMATION

capacitance and a ceramic capacitor in parallel to lower

the total effective ESR. For this design, a 100μF ceramic

current rating of:

IA

V

V

V

V

A

RMS

RMS

==

25

33

8 4

8 4

33

11 22

.•

.

.

•

.

.

–.

adequate for most applications.

The output voltage can now be programmed by choosing

the values of R1 and R2. Chose R1 = 105k and calculate

R2 as:

R2

=R1

V

OUT

0.6V

–1

⎛

⎝

⎜⎜

⎞

⎠

⎟⎟ = 472.5k

Choose a standard value of R2 = 475k. The voltage on

the MODE pin will be set to 0.6V by tying the MODE pin

to the FB pin. This will set the burst current equal to ap-

proximately 1A. Figure 6 shows a complete schematic for

this design example.

PC Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC3602. Check the following in your layout:

1. A ground plane is recommended. If a ground plane layer

is not used, the signal and power grounds should be

segregated with all small signal components returning

to the SGND pin at one point which is then connected

to the PGND pin close to the LTC3602.

the AC current into the internal power MOSFETs.

3. Keep the switching node, SW, away from all sensitive

small signal nodes.

4. Flood all unused areas on all layers with copper. Flooding

with copper will reduce the temperature rise of power

components. You can connect the copper areas to any

DC rail in your system).

Figure 6. 8.4V to 3.3V, 2.5A Regulator at 1MHz, Burst Mode Operation

22μF

8.4V

3.3V

2.5A

3602 F06

D1

L1

2.2μH

105k

4.32k

R1

105k

200k

L1: VISHAY IHLP2525CZER2R2MO1

1μF

1nF

100μF

SYNC/MODE

PGOOD

RUN

TRACK/SS

PGND

BOOST

SW

SW

SW

PGND

PGND

LTC3602

R2

475k

0.22μF

PGOOD

22pF