AD7674

Rev. A | Page 8 of 28

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

1

2

3

4

5

6

7

8

9

10

11

12

AGND

AVDD

MODE0

MODE1

D0/OB/2C

WARP

IMPULSE

D1/A0

D2/A1

D3

D4/DIVSCLK[0]

D5/DIVSCLK[1]

NOTES

1. NC = NO CONNECT.

2. THE EXPOSED PAD IS INTERNALLY CONNECTED TO AGND. THIS CONNECTION

IS NOT REQUIRED TO MEET THE ELECTRICAL PERFORMANCES HOWEVER, FOR

INCREASED RELIABILITY OF THE SOLDER JOINTS, IT IS RECOMMENDED THAT

THE PAD BE SOLDERED TO THE ANALOG GROUND OF THE SYSTEM.

CNVST

PD

RESET

CS

RD

DGND

BUSY

D17

D16

D15

D14

35

AGND

36

34

33

32

31

30

29

28

27

26

25

AD7674

TOP VIEW

(Not to Scale)

PIN 1

INDICATOR

Figure 4. 48-Lead LQFP and 48-Lead LFCSP (ST-48 and CP-48)

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 44

AGND

P

Analog Power Ground Pin.

2, 47

AVDD

P

Input Analog Power Pins. Nominally 5 V.

3

MODE0

DI

Data Output Interface Mode Selection.

4

MODE1

DI

Data Output Interface Mode Selection:

Interface MODE

#

MODE1

MODE0

Description

0

0

0

18-Bit

Interface

1

0

1

16-Bit

Interface

2

1

0

Byte Interface

3

1

1

Serial Interface

5

D0/OB/2C

DI/O

When MODE = 0 (18-bit interface mode), this pin is Bit 0 of the parallel port data output bus and the

data coding is straight binary. In all other modes, this pin allows choice of straight binary/binary twos

complement. When OB/2C is HIGH, the digital output is straight binary; when LOW, the MSB is inverted,

resulting in a twos complement output from its internal shift register.

6

WARP

DI

Conversion Mode Selection. When this input is HIGH and the IMPULSE pin is LOW, WARP selects the

fastest mode, the maximum throughput is achievable, and a minimum conversion rate must be applied

in order to guarantee full specified accuracy. When LOW, full accuracy is maintained independent of the

minimum conversion rate.

7

IMPULSE

DI

Conversion Mode Selection. When this input is HIGH and the WARP pin is LOW, IMPULSE selects a

reduced power mode. In this mode, the power dissipation is approximately proportional to the

sampling rate. When WARP and IMPULSE pins are LOW, the NORMAL mode is selected.

8

D1/A0

DI/O

When MODE = 0 (18-bit interface mode), this pin is Bit 1 of the parallel port data output bus. In all other

modes, this input pin controls the form in which data is output, as shown in Table 7.