AD7694 datasheet(14/28 Pages) AD

14 / 28 page

AD7688

Rev. A | Page 14 of 28

ANALOG INPUT

Figure 27 shows an equivalent circuit of the input structure of

the AD7688.

The two diodes, D1 and D2, provide ESD protection for the

analog inputs IN+ and IN−. Care must be taken to ensure that

the analog input signal never exceeds the supply rails by more

than 0.3 V because this causes these diodes to begin to forward-

bias and start conducting current. These diodes can handle a

forward-biased current of 130 mA maximum. For instance,

these conditions could eventually occur when the input buffer’s

(U1) supplies are different from VDD. In such a case, an input

buffer with a short-circuit current limitation can be used to

protect the part.

CIN

RIN

CPIN

IN+

OR IN–

GND

VDD

Figure 27. Equivalent Analog Input Circuit

The analog input structure allows the sampling of the true

differential signal between IN+ and IN−. By using these

differential inputs, signals common to both inputs are rejected,

as shown in Figure 28, which represents the typical CMRR over

frequency.

FREQUENCY (kHz)

10000

100

1000

VDD = 5V

Figure 28. Analog Input CMRR vs. Frequency

During the acquisition phase, the impedance of the analog

inputs (IN+ or IN−) can be modeled as a parallel combination

of capacitor, CPIN, and the network formed by the series

connection of RIN and CIN. CPIN is primarily the pin capacitance.

RIN is typically 600 Ω and is a lumped component made up of

some serial resistors and the on resistance of the switches. CIN is

typically 30 pF and is mainly the ADC sampling capacitor.

During the conversion phase, where the switches are opened,

the input impedance is limited to CPIN. RIN and CIN make a

1-pole, low-pass filter that reduces undesirable aliasing effects

and limits the noise.

When the source impedance of the driving circuit is low, the

AD7688 can be driven directly. Large source impedances

significantly affect the ac performance, especially total

harmonic distortion (THD). The dc performances are less

sensitive to the input impedance. The maximum source

impedance depends on the amount of THD that can be

tolerated. The THD degrades as a function of the source

impedance and the maximum input frequency, as shown in

Figure 29.

FREQUENCY (kHz)

–60

–70

–80

–90

–100

–110

–120

100

RS = 250Ω

RS = 100Ω

RS = 50Ω

RS = 33Ω

Figure 29. THD vs. Analog Input Frequency and Source Resistance

AD7694 데이터시트(PDF) 14 Page - Analog Devices

AD7694 데이터시트(HTML) 14 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

데이터시트 다운로드

링크 URL