Data Sheet

ADA4895-2

Rev. 0 | Page 21 of 24

HIGH GAIN BANDWIDTH APPLICATION

The circuit in Figure 45 shows cascaded dual amplifier stages

using the ADA4895-2. Each stage has a gain of +10 (+20 dB),

making the output 100 times (+40 dB) the input. The total gain

bandwidth product is approximately 9 GHz with the part

operating on 6 mA of quiescent current (3 mA per amplifier).

50

Ω

1k

Ω

226

Ω

2pF

5pF

25.5

Ω

226

Ω

2pF

25.5

Ω

249

Ω

Figure 45. Cascaded Amplifier Stages for High Gain Applications (G = +100)

Figure 46 shows the large signal frequency response for two cases.

the second case is without these capacitors. Removing the 2 pF

feedback capacitors from this circuit increases the bandwidth,

but adds about 0.5 dB of peaking.

0

4

8

12

16

20

24

28

32

36

40

44

0.1

1

10

100

1000

FREQUENCY (MHz)

G = +100

To better balance the second stage and remove the current offset

match between the source impedance and the feedback network

impedance on the input amplifier. (In the example shown in

is within the same statistical range. As configured, the offset of

the output amplifier is not statistically significant to the overall

offset of the system.

Figure 46 was captured using a ±5 V supply; however, this circuit

will also operate with supplies from ±1.5 V to ±5 V as long as the

input and output headroom values are not violated.