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SN75LBC971ADLR 데이터시트(PDF) 1 Page - Texas Instruments

부품명 SN75LBC971ADLR
상세설명  SCSI DIFFERENTIAL CONVERTER-DATA
PDF  15 Pages
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SN75LBC971A
SCSI DIFFERENTIAL CONVERTER-DATA
SLLS186B – OCTOBER 1994 – REVISED JULY 1997
1
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
D Provides Differential SCSI From
Single-Ended Controller When Used With
the SN75LBC970A Control Transceiver
D Designed to Operate at Fast-SCSI Speed of
Ten Million Data Transfers per Second
D Meets or Exceeds the Requirements of EIA
Standard RS-485 and ISO-8482 Standards
D Packaged in Shrink Small-Outline Package
With 25-Mil Terminal Pitch
D Low Disabled-Supply Current
23 mA Typ
D Thermal Shutdown Protection
D Positive- and Negative-Current Limiting
D Power-Up/-Down Glitch Protection
description
The SN75LBC971A SCSI differential converter-data is
an adaptation of the industry’s first 9-channel RS-485
transceiver, the SN75LBC976. When used in conjunc-
tion with its companion control transceiver, the
SN75LBC970A, the resulting chip set provides the
superior electrical performance of differential SCSI
from a single-ended SCSI bus or controller. A 16-bit
SCSI bus can be implemented with just three devices
(two data and one control) in the space efficient, 56-pin,
shrink small-outline package (SSOP) and a few
external components. An 8-bit SCSI bus requires only
one data and one control transceiver.
In a typical differential SCSI node, the SCSI controller
provides an enable for each external RS-485
transceiver channel. This could require as many as 27
extra terminals for a 16-bit differential bus controller or
relegate a 16-bit, single-ended controller to only an
8-bit differential bus. Using the standard nine SCSI
control signals, the SN75LBC970A control transceiver decodes the state of the bus and enables the
SN75LBC971A data transceiver to transmit the single-ended SCSI input signals (A side) differentially to the
cable or receive the differential cable signals (B side) and drive the single-ended outputs to the controller.
A reset function, which disables all outputs and clears internal latches, can be accomplished from two external
inputs and two internally-generated signals. RESET (reset) and DSENS (differential sense) are available to
external circuits for a bus reset or to disable all outputs should a single-ended cable be inadvertently connected
to a differential connector. Internally-generated power-up and thermal-shutdown signals have the same affect
when the supply voltage is below approximately 3.5 V or the junction temperature exceeds 175
°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
© 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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SDB
DRVBUS
GND
ADBP –
NC
ADB7 –
NC
ADB6 –
NC
ADB5 –
NC
VCC
GND
GND
GND
GND
GND
VCC
ABD4 –
NC
ADB3 –
NC
ADB2 –
NC
ADB1 –
NC
ADB0 –
NC
DSENS
RESET
GND
BDBP –
BDBP +
BDB7 –
BDB7 +
BDB6 –
BDB6 +
BDB5 –
BDB5 +
VCC
GND
GND
GND
GND
GND
VCC
BDB4 –
BDB4 +
BDB3 –
BDB3 +
BDB2 –
BDB2 +
BDB1 –
BDB1 +
BDB0 –
BDB0 +
DL PACKAGE
(TOP VIEW)
NC – No internal connection
Pins 13 – 17 and 40 – 44 are connected
together to the package lead frame and
to signal ground.


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