Product Specification

PE42421

Page 5 of 9

©2010-2013 Peregrine Semiconductor Corp. All rights reserved.

Document No. 70-0396-03 │ www.psemi.com

T-line Description

--

Model = CPWG

H= 28 mils

T= 2.1 mils

W=47 mils

G= 30 mils

Er = 4.4

SEEASSYNOTE 2

SEEASSYNOTE 2

J7

CNTL

1

J3

RF2

R1

1KOhm

R2

1KOhm

1

J5

N/A

1

J4

N/A

1

J2

RF1

J6

CNTLX/VDD

2

GND

1

RF_1

3

RF_2

4 CTRL

5 RFC

6 VDD

U1

PE42421/SC70-6

1

J1

RFC

C1

0.5pF

C2

0.5pF

Evaluation Kit

The SPDT switch EK Board was designed to ease

customer evaluation of Peregrine’s PE42421. The

RF common port is connected through a 50Ω

transmission line via the top SMA connector, J1.

RF1 and RF2 are connected through 50Ω

transmission lines via SMA connectors J2 and J3,

respectively. A through 50Ω transmission is

available via SMA connectors J4 and J5. This

transmission line can be used to estimate the loss

of the PCB over the environmental conditions

being evaluated.

The board is constructed of a two metal layer FR4

material with a total thickness of 0.031”. The

bottom layer provides ground for the RF

transmission lines. The transmission lines were

designed using a coplanar waveguide with ground

plane model using a trace width of 0.0476”, trace

gaps of 0.030”, dielectric thickness of 0.028”,

J6 and J7 provide a means for controlling DC and

digital inputs to the device. J6-1 is connected to

to the device CTRL input.

Figure 5. Evaluation Board Layouts

Figure 6. Evaluation Board Schematic

Peregrine Specification 102-0756-01

Peregrine Specification 101-0162-02

Notes: Add two 0.5 pF caps in series to be shunted on the J1 SMA input

Solder C1 side 1 to the RF trace close to the J1 pin

Solder C1 side 2 to C2 side 1

Solder C2 side 2 to ground

General Comments

Transmission lines connected to J1, J2, and J3 should have exactly the

same electrical length

The path from J2 to J3 including the distance through the part should

have the same length as J4 and J5 and be in parallel to J4 to J5