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A8905CLB 데이터시트(PDF) 5 Page - Allegro MicroSystems

부품명 A8905CLB
상세설명  3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING
PDF  12 Pages
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제조업체  ALLEGRO [Allegro MicroSystems]
홈페이지  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A8905CLB 데이터시트(HTML) 5 Page - Allegro MicroSystems

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8905
3-PHASE BRUSHLESS DC
MOTOR CONTROLLER/DRIVER
TERMINAL FUNCTIONS
Term.
Terminal Name
Function
1
LOAD SUPPLY
VBB; the 5 V or 12 V motor supply.
2CD2
One of two capacitors used to generate the ideal commutation points from the back-EMF
zero-crossing points.
3CWD
Timing capacitor used by the watchdog circuit to disable the back-EMF comparators
during commutation transients, and to detect incorrect motor position.
4CST
Startup oscillator timing capacitor.
5
OUTA
Power amplifier output A to motor.
6-7
GROUND
Power and logic ground and thermal heat sink.
8
OUTB
Power amplifier output B to motor.
9
OUTC
Power amplifier output C to motor.
10
CENTERTAP
Motor centertap connection for back-EMF detection circuitry.
11
BRAKE
Active low turns ON all three sink drivers shorting the motor windings to ground. External
capacitor and resistor at BRAKE provide brake delay. The brake function can also be
controlled via the serial port.
12
CRES
External reservoir capacitor used to hold charge to drive the source drivers’ gates. Also
provides power for brake circuit.
13
FILTER
Analog voltage input to control motor current. Also, compensation node for internal speed
control loop.
14
INDEX
External tachometer input.
15
LOGIC SUPPLY
VDD; the 5 V logic supply.
16
OSCILLATOR
Clock input for the speed reference counter. Typical max. frequency is 10 MHz.
17
DATA OUT
Thermal shutdown indicator, FCOM, TACH, or SYNC signals available in real time,
controlled by 2-bit multiplexer in serial port.
18-19
GROUND
Power and logic ground and thermal heat sink.
20
RESET
When pulled low forces the chip into sleep mode; clears all serial port bits.
21
CHIP SELECT
Strobe input (active low) for data word.
22
CLOCK
Clock input for serial port.
23
DATA IN
Sequential data input for the serial port.
24
CD1
One of two capacitors used to generate the ideal commutation points from the back-EMF
zero-crossing points.



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