전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

MP2372DN 데이터시트(PDF) 10 Page - Monolithic Power Systems

부품명 MP2372DN
상세설명  3A, 28V, 925KHz Step-Down Converter
PDF  13 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  MPS [Monolithic Power Systems]
홈페이지  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP2372DN 데이터시트(HTML) 10 Page - Monolithic Power Systems

Back Button MP2372DN Datasheet HTML 5Page - Monolithic Power Systems MP2372DN Datasheet HTML 6Page - Monolithic Power Systems MP2372DN Datasheet HTML 7Page - Monolithic Power Systems MP2372DN Datasheet HTML 8Page - Monolithic Power Systems MP2372DN Datasheet HTML 9Page - Monolithic Power Systems MP2372DN Datasheet HTML 10Page - Monolithic Power Systems MP2372DN Datasheet HTML 11Page - Monolithic Power Systems MP2372DN Datasheet HTML 12Page - Monolithic Power Systems MP2372DN Datasheet HTML 13Page - Monolithic Power Systems  
Zoom Inzoom in Zoom Outzoom out
 10 / 13 page
background image
MP2372 – 3A, 28V, 925KHZ STEP-DOWN CONVERTER
MP2372 Rev. 0.92
www.MonolithicPower.com
10
12/22/2009
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2009 MPS. All Rights Reserved.
PCB Layout Guide
PCB layout is very important to achieve stable
operation. Please follow these guidelines and
take Figure2 and 3 for references.
1) Keep the path of switching current short and
minimize the loop area formed by Input cap,
high-side MOSFET and schottky diode.
2) Keep the connection of schottky diode
between SW pin and input power ground as
short and wide as possible.
3) Ensure all feedback connections are short
and direct. Place the feedback resistors and
compensation components as close to the
chip as possible.
4) Route SW away from sensitive analog areas
such as FB.
5) Connect IN, SW, and especially GND
respectively to a large copper area to cool
the chip to improve thermal performance and
long-term reliability. For single layer, do not
solder exposed pad of the IC.
C1
D1
R3
R1
C2
R4
SGND
PGND
L1
C3
R2
C6
Figure2―PCB Layout for Single Layer
C5
C1
D1
C3
R3
C2
R4
L1
SGND
PGND
C4
C6
Vout
Feeback
SGND
Top Layer
Bottom Layer
Figure3―PCB Layout for Double Layer



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com