DSPIC33FJ256GP710A datasheet(21/338 Pages) MICROCHIP

21 / 338 page

 2009 Microchip Technology Inc.

Preliminary

DS70593B-page 21

dsPIC33FJXXXGPX06A/X08A/X10A

1.0

DEVICE OVERVIEW

This document contains device specific information for

the following devices:

• dsPIC33FJ64GP206A

• dsPIC33FJ64GP306A

• dsPIC33FJ64GP310A

• dsPIC33FJ64GP706A

• dsPIC33FJ64GP708A

• dsPIC33FJ64GP710A

• dsPIC33FJ128GP206A

• dsPIC33FJ128GP306A

• dsPIC33FJ128GP310A

• dsPIC33FJ128GP706A

• dsPIC33FJ128GP708A

• dsPIC33FJ128GP710A

• dsPIC33FJ256GP506A

• dsPIC33FJ256GP510A

• dsPIC33FJ256GP710A

The

dsPIC33FJXXXGPX06A/X08A/X10A

General

Purpose Family of device includes devices with a wide

range of pin counts (64, 80 and 100), different program

memory sizes (64 Kbytes, 128 Kbytes and 256 Kbytes)

and different RAM sizes (8 Kbytes, 16 Kbytes and

30 Kbytes).

This feature makes the family suitable for a wide variety

of high-performance digital signal control applications.

The device is pin compatible with the PIC24H family of

devices, and also share a very high degree of

compatibility with the dsPIC30F family devices. This

allows for easy migration between device families as may

necessitated

the

specific

functionality,

computational resource and system cost requirements of

the application.

The dsPIC33FJXXXGPX06A/X08A/X10A device fam-

ily employs a powerful 16-bit architecture that seam-

lessly

integrates

the

control

features

Microcontroller (MCU) with the computational capabili-

ties of a Digital Signal Processor (DSP). The resulting

functionality is ideal for applications that rely on

high-speed, repetitive computations, as well as control.

The DSP engine, dual 40-bit accumulators, hardware

support for division operations, barrel shifter, 17 x 17

multiplier, a large array of 16-bit working registers and

a wide variety of data addressing modes, together

provide

the

dsPIC33FJXXXGPX06A/X08A/X10A

Central

Processing

Unit

(CPU)

with

extensive

mathematical

processing

capability.

Flexible

and

deterministic

interrupt

handling,

coupled

with

powerful

array

peripherals,

renders

the

dsPIC33FJXXXGPX06A/X08A/X10A devices suitable

for control applications. Further, Direct Memory Access

(DMA) enables overhead-free transfer of data between

several peripherals and a dedicated DMA RAM.

Reliable, field programmable Flash program memory

ensures

scalability

applications

that

use

dsPIC33FJXXXGPX06A/X08A/X10A devices.

Figure 1-1 illustrates a general block diagram of the

various

core

and

peripheral

modules

the

dsPIC33FJXXXGPX06A/X08A/X10A family of devices.

Table 1-1 provides the functions of the various pins

illustrated in the pinout diagrams.

Note:

This data sheet summarizes the features

of the dsPIC33FJXXXGPX06A/X08A/X10A

family of devices. However, it is not

intended to be a comprehensive reference

source. To complement the information in

this data sheet, refer to the latest family

reference sections of the “dsPIC33F/

PIC24H Family Reference Manual”, which

are available from the Microchip website

(www.microchip.com).

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