MP8652 – 15A, 14V, HIGH FREQUENCY STEP-DOWN WITH SYNCHRONOUS GATE DRIVER

MP8652 Rev. 0.9

www.MonolithicPower.com

11

10/26/2009

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Table 3—Compensation Values for Typical Output Voltage / Capacitor

(V)

L1

(µH)

C2,

Ceramic

(µF)

C2, Poscap

(µF)/ESR(mΩ)

R3

(kΩ)

C3

(nF)

C6

(pF)

1.2

0.82

100X2

None

2.2

10

100

1.2

0.82

47

330/ 9/ 6.3V

5.49

3.3

560

1.8

0.82

47

330/ 9/ 6.3V

8.25

2.2

390

2.5

1.2

47

330/ 9/ 6.3V

11.5

1.5

270

3.3

1.3

47

220/ 18/ 6.3V

8.06

2.7

680

5

1.8

47

220/ 18/ 6.3V

16

1

100

To optimize the compensation components ，

the following procedure can be used.

1. Choose the compensation resistor (R3) to set

the desired crossover frequency. Determine the

R3 value by the following equation:

FB

OUT

CS

EA

C

V

V

G

G

f

2

C

2

3

R

×

×

×

×

π

=

2. Choose the compensation capacitor (C3) to

achieve

the

desired

phase

margin.

For

applications with typical inductor values, setting

the crossover frequency provides sufficient

phase margin. Determine the C3 value by the

following equation:

C

f

3

R

2

4

3

C

×

×

π

>

3. Determine if the second compensation

capacitor (C6) is required. It is required if the

ESR zero of the output capacitor is located at

less than half of the switching frequency, or the

following relationship is valid:

2

f

R

2

C

2

1

S

ESR

<

×

×

π

If this is the case, then add the second

at the location of the ESR zero. Determine the

C6 value by the equation:

3

R

R

2

C

6

C

ESR

×

=

PCB Layout Guide

PCB layout is very important to achieve stable

operation. Please follow these guidelines and

take Figure 4 for references.

1) Keep the path of switching current short

and minimize the loop area formed by Input

cap, high-side and low-side MOSFETs.

2) Keep the connection of low-side MOSFET

between SW pin and input power ground

as short and wide as possible.

3) Ensure all feedback connections are short

and direct. Place the feedback resistors

and compensation components as close to

the chip as possible.

4) Route SW away from sensitive analog

areas such as FB.

5) Connect IN, SW, and especially GND

respectively to a large copper area to cool

the chip to improve thermal performance

and long-term reliability.

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