AD7870/AD7875/AD7876

Rev. C | Page 9 of

28

DIP and SOIC

Pin No.

PLCC

Pin No.

Mnemonic

Function

18

21

AGND

Analog Ground. Ground reference for track-and-hold, reference and DAC.

19

23

REF OUT

Voltage Reference Output. The internal 3 V reference is provided at this pin. The external load capability is

500 μA.

20

24

Analog Input. The analog input range is ±3 V for the AD7870, ±10 V for the AD7876, and 0 V to +5 V for the

AD7875.

21

25

Negative Supply, −5 V ± 5%.

22

26

12/8/CLK

Three Function Input. Defines the data format and serial clock format. With this pin at +5 V, the output

data for-mat is 12-bit parallel only. With this pin at 0 V, either byte or serial data is available and SCLK is

not continuous. With this pin at −5 V, either byte or serial data is again available but SCLK is now

continuous.

23

27

CONVST

Convert Start. A low to high transition on this input puts the track-and-hold into its hold mode and

starts conversion. This input is asynchronous to the CLK input.

24

28

CS

Chip Select. Active low logic input. The device is selected when this input is active. With CONVST tied

low, a new conversion is initiated when CS goes low.

Table 6. Output Data for Byte Interfacing

HBEN

DB7/Low

DB6/Low

DB5/Low

DB4/Low

DB3/DB11

DB2/DB10

DB1/DB9

DB0/DB8

High

Low

Low

Low

Low

DB11(MSB)

DB10

DB9

DB8

Low

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0 (LSB)