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MP38874 데이터시트(PDF) 2 Page - Monolithic Power Systems |
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MP38874 데이터시트(HTML) 2 Page - Monolithic Power Systems |
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2 / 11 page ![]() MP38874 – 8A, 21V, 600KHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER MP38874 Rev. 1.1 www.MonolithicPower.com 2 10/13/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature(TA) MP38874DL 3x4 QFN14 38874 –40 °C to +85°C * For Tape & Reel, add suffix –Z (e.g. MP38874DL–Z); For RoHS compliant packaging, add suffix –LF (e.g. MP38874DL–LF–Z) PACKAGE REFERENCE ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage VIN ....................................... 23V VSW........................-0.3V (-5V for < 10ns) to 24V VBS ....................................................... VSW + 6V All Other Pins.................................–0.3V to +6V Continuous Power Dissipation (TA = +25°C) (2) ............................................................. 2.8W Junction Temperature...............................150 °C Lead Temperature ....................................260 °C Storage Temperature.............. –65 °C to +150°C Recommended Operating Conditions (3) Supply Voltage VIN ...........................4.5V to 21V Output Voltage VOUT.........................0.8V to 15V Operating Junct. Temp (TJ)...... -40°C to +125°C Thermal Resistance (4) θJA θJC 3x4 QFN14 ............................. 45 ...... 10... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)- TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD5 1-7, 4-layer PCB. TOP VIEW FB PG EN/SYNC IN IN IN N/C 1 2 3 4 5 6 7 GND BG VCC BST SW SW SW 14 13 12 11 10 9 8 EXPOSED PAD ON BACKSIDE |
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