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ADG621 데이터시트(PDF) 7 Page - Analog Devices

부품명 ADG621
상세설명  CMOS 5 V/5 V, 4 Dual SPST Switches
PDF  12 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADG621 데이터시트(HTML) 7 Page - Analog Devices

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ADG621/ADG622/ADG623
Rev. B | Page 7 of 12
TERMINOLOGY
IDD
Positive supply current.
ISS
Negative supply current
VD (VS)
Analog voltage on Terminal D and Terminal S.
RON
Ohmic resistance between Terminal D and Terminal S.
RFLAT(ON)
On resistance flatness is defined as the difference between the
maximum and minimum value of on resistance as measured
over the specified analog signal range.
∆RON
On resistance match between any two channels.
IS (Off)
Source leakage current with the switch off.
ID (Off)
Drain leakage current with the switch off.
ID, IS (On)
Channel leakage current with the switch on.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
CS (Off)
Off switch source capacitance. Measured with reference to
ground.
CD (Off)
Off switch drain capacitance. Measured with reference to
ground.
CD, CS (On)
On switch capacitance. Measured with reference to ground.
CIN
Digital input capacitance.
tON
Delay time between the 50% and the 90% points of the digital
input and switch on condition.
tOFF
Delay time between the 50% and the 90% points of the digital
input and switch off condition.
tBBM
On or off time measured between the 90% points of both
switches when switching from one address state to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during on-off switching.
Off Isolation
A measure of an unwanted signal coupling through an
off switch.
Crosstalk
A measure of an unwanted signal that is coupled through from
one channel to another as a result of parasitic capacitance.
−3 dB Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
Insertion Loss
The attenuation between the input and output ports of the
switch when the switch is in the on condition and is due to
the on resistance of the switch.



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