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AM79C90PC 데이터시트(PDF) 26 Page - Advanced Micro Devices

부품명 AM79C90PC
상세설명  CMOS Local Area Network Controller for Ethernet (C-LANCE)
PDF  62 Pages
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제조업체  AMD [Advanced Micro Devices]
홈페이지  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C90PC 데이터시트(HTML) 26 Page - Advanced Micro Devices

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AMD
P R E L I M I N A R Y
26
Am79C90
The Broadcast address, which consists of all ones is a
special multicast address. Packets addressed to the
broadcast address must be received by all nodes. Since
broadcast packets are usually more common than other
multicast packets, the broadcast address should be the
first address in the multicast address list.
The Broadcast address does not go through the Logical
Address Filter and is always enabled. If the Logical Ad-
dress Filter is loaded with all zeroes, all incoming logical
addresses except broadcast will be rejected. The multi-
cast addressing in external loopback is operational only
when DTCR in the mode register is set to 1.
Destination
Address
47
1 0
CRC
Gen
32-Bit Resultant CRC
31
26
0
Logical Address
Filter
63
0
“1”
Enable
64
MUX
Select
Match*
6
*Match - 1, the packet is accepted
Match - 0, the packet is rejected
17881B-22
Figure 7. Logical Address Filter Operation
Receive Descriptor Ring Pointer
31
2 0
17881B-23
29 28 24 23
3
RES
RLEN
000 ‘(Quadword
Boundary)’
RDRA (23:03)
Bit
Name
Description
31:29
RLEN
RECEIVE RING LENGTH is the
number of entries in the receive ring
expressed as a power of two.
RLEN
Number of Entries
01
12
24
38
4
16
5
32
6
64
7
128
28:24
RES
RESERVED. Read as zeroes. Write
as zeroes.
23:03
RDRA
RECEIVE DESCRIPTOR RING AD-
DRESS is the base address (lowest
address) of the Receive Descriptor
Ring.
02:00
MUST BE ZEROES. These bits are
RDRA (02:00) and must be zeroes
because the Receive Ring is aligned
on a quadword boundary.
Transmit Descriptor Ring Pointer
31
2 0
17881B-24
29 28 24 23
3
RES
TLEN
000 ‘(Quadword
Boundary)’
TDRA (23:03)
31:29
TLEN
TRANSMIT RING LENGTH is the
number of entries in the Transmit
Ring expressed as a power of two.
TLEN
Number of Entries
01
12
24
38
4
16
5
32
6
64
7
128
28:24
RES
RESERVED. Read as zeroes. Write
as zeroes.
23:03
TDRA
TRANSMIT DESCRIPTOR RING
ADDRESS is the base address (low-
est address) of the Transmit De-
scriptor Ring.
02:00
MUST BE ZEROES. These bits are
TDRA (02:00) and must be zeroes
because
the
Transmit
Ring
is
aligned on a quadword boundary.



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