AMD

PRELIMINARY

1–17

Am79C982

19406B-7

ASYNC

RESET

SI

CK

bIMR8

REQ ACK COL DAT JAM

CRS

SO

STR

X1

RST

TEST

SI

SCLK

bIMR4

REQ ACK COL DAT JAM

CRS

SO

STR

X1

RST

TEST

SI

SCLK

ARBITER

REQ1

REQ2

20 MHz CLK

CK

Q

Q

CLR

D

CK

Q

Q

CLR

D

CK

Q

Q

CLR

D

SI

CK

SI

CK

SI

CK

5 V

5 V

CK

CK

CK

CK

SHIFT REG

SHIFT REG

SHIFT REG

SHIFT REG

SW 1

PORT ACTIVITY LEDS

PORT STATUS LEDS

Notes:

1. Both bIMR8 and bIMR4 devices are used in Minimum Mode.

2. The information displayed by Port Status LEDs is selected by SW1. In this design, only Link Status and Port Partition Status can

be selected. Users can implement more display options by changing the state of the SCLK input (see the section on Minimum

Mode for detail).

3. The Polarity correction feature is shown disabled since the SI is high at reset. Users can enable this feature by keeping the SI

input low upon reset.

Figure 2. Implementing a 12-Port Unmanaged Hub using a bIMR8 and a bIMR4